SAN JOSE, Calif., Feb 8 (Bernama-GLOBE NEWSWIRE) -- NetSpeed Systems Inc. today
announced a collaboration with Synopsys to enable generated RTL of
NetSpeed’s interconnect IP to be used with Synopsys' Platform Architect™
virtual prototyping solution. The collaboration enables the delivery of
advanced interconnect solutions for leading advanced driver assistance
systems (ADAS) and datacenter system-on-chips (SoCs) designs. The
integrated solutions offer system designers the ability to simulate
realistic system-level performance of their end product architectures.
“As
we have collaborated with industry leaders developing ADAS and
datacenter SoCs, we recognize the challenge system designers and
architects face to avoid late discovery of system performance and power
problems, which can be costly in terms of both project schedules and
budgets,” said Eshel Haritan, Vice President of R&D in the Synopsys
Verification Group. “Our collaboration with NetSpeed enables these
companies to validate system performance and functional safety for their
SoC designs much earlier in the design process.”
Heterogeneous
platform designs are becoming the norm for ADAS and data center SoCs
because they offer higher performance and better power efficiency than
multicore designs. However, heterogeneous designs are far more complex
than multicore implementations due to the need to balance diverse
processing and traffic needs.
To address the challenges of
heterogeneous designs, NetSpeed offers a programmable, highly
configurable cache coherent IP that enables SoC architects to create
custom interconnect solutions to achieve optimal performance for their
application. Synopsys, with its Platform Architect solution, offers
system architects the ability to assemble and analyze system-level
performance models before RTL is finalized.
“Performance and
latency are two key metrics that must be validated early on for
automotive and datacenter SoCs designs,” said Sundari Mitra, CEO of
NetSpeed. “Coherency adds another dimension of complexity, as does
functional safety in automotive SoCs which also must be verified. Our
collaboration with Synopsys is an important step in ensuring
leading-edge ADAS and data center OEMs are able to validate their
designs quickly and easily.”
The collaboration between the two
companies allows the generated RTL of NetSpeed’s interconnect to be
easily imported into Synopsys' Platform Architect environment for
architecture analysis. System designers can assemble their design by
combining the NetSpeed interconnect with traffic generators and
architecture models available in the Platform Architect model library.
This flow enables early analysis of end-application performance and
allows for highly efficient optimization of heterogeneous system
architectures early in the design and months before system software or
RTL availability.
About NetSpeed Systems
NetSpeed
Systems provides scalable, coherent on-chip network IPs to SoC
designers for a wide range of markets from mobile to high-performance
computing and networking. NetSpeed's on-chip network platform delivers
significant time-to-market advantages through a system-level approach, a
high level of user-driven automation and state-of-the-art algorithms.
NetSpeed Systems was founded in 2011 and is led by seasoned executives
from the semiconductor and networking industries. The company is funded
by top-tier investors from Silicon Valley. It is based in San Jose,
California and has additional research and development facilities in
Asia. For more information, visit www.netspeedsystems.com.
Press Contact:
NetSpeed Newsroom
Pauline Shulman
415-375-0303
pauline@pshulman.com
A photo accompanying this announcement is available at http://www.globenewswire.com/NewsRoom/AttachmentNg/4485af62-e4ea-465e-b95c-1194a857499b
SOURCE : NetSpeed Systems
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